Firmware Engineer II
Apply on Cadence’s site →At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description Design Engineer II This is an opportunity to join a dynamic and growing team of experienced engineers developing physical layer IP’s for industry-standard high-speed serial-link protocols. The successful candidate will ideally be a highly motivated self-starter who can work independently to complete assigned tasks and collaborate with other members to achieve project milestones. It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES - from architecture development to implementation, verification, testing and customer deployment. Responsibilities Work closely with PHY digital and mixed signal architects to figure out the details of FW functions and sequences. Contribute during firmware architecture development and implementation of the defined firmware features. Help to build system level prototype control software to develop/validate adaptation, equalization, and control algorithms for high speed SERDES. Implement assigned FW features and work closely with verification[simulation] and validation team to ensure the functionality and robustness of the implemented features. Support FuSa compliant firmware development. Work closely with verification and validation team to develop and execute test plans for FuSa compliant firmware. Support of Validation team during electrical and system characterization during post-silicon testing.