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Silicon Roles

Power Validation Engineer

EtchedSan JosePower Electronics
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First seen on this site 2026-08-10.
Posted 2026-04-30 · read from ashby

About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. Job Summary We are looking for a Power Validation Engineer to own the end-to-end power characterization of our ASIC and the mezzanine card platform — from early silicon bring-up through production qualification. You will design measurement methodology, build test benches, and drive findings directly into silicon, package, and system design decisions. Key Responsibilities - Design and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs - Validate power delivery network (PDN) performance — VRM load step response, PCIe power compliance, PDN impedance — and translate measurements into actionable feedback on capacitor placement, plane geometry, and de-cap strategy for PCB and package design teams - Profile power transient events (ramp rates, droop amplitudes, recovery profiles) and correlate them with on-die performance monitor data; build automated power sweep frameworks exercising the full inference…