Principal Design Verifiction Engineer

SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. At the core of SambaNova's technology is the RDU (Reconfigurable Dataflow Unit) — a chip built on a dataflow architecture rather than the traditional GPU model. Its decode performance is especially strong for agentic workloads like multi-turn agents, code generation, and long-running applications. RDUs are packaged into SambaRack, rack-scale hardware that lets customers deploy state-of-the-art models with better performance, greater energy efficiency, and faster time to value. Job Overview SambaNova Systems is looking for a Principal Design Verification Engineer to own verification for a major subsystem of our next-generation RDU — the reconfigurable dataflow silicon behind our machine learning and AI systems. This is a senior individual-contributor role with real ownership. You will own the test plan, testbench architecture, coverage model, formal verification and sign-off criteria for your area, and you will be the person the team looks to when the hardest failures need root-causing. You will also shape methodology beyond your own subsystem: the infrastructure, reuse patterns, and verification practices the rest of the team builds on. You will work alongside principal engineers who have built and evolved this verification environment across several generations of silicon, and with design, architecture, compiler, and runtime teams to make sure the chip is verified against real ML workloads.