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Silicon Roles

Process Integration and Yield Technician (ICE)

IntelUS, Oregon, Hillsboro$52,000+Process & Fab
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The published floor of $52,000 is 58% below the Process & Fab median of $124,000. First seen on this site 2026-09-29.
Posted 2026-09-28 · read from workday

Job Details: Job Description: Intel’s Wafer Packaging Manufacturing organization supports semiconductor wafer processing, testing, and die-to-wafer assembly. We are seeking two ORAP (Oregon Advanced Packaging) Integration Yield Technicians to provide manufacturing sustaining and engineering development support across HBI, WLA, Die Prep, and TSVr. You will work closely with integration engineers, factory operations, and cross-functional teams to resolve material issues, contain process excursions, and keep work in process moving safely through the factory. This hands-on role combines real-time troubleshooting, lot disposition, defect investigation, and continuous improvement. HBI ramp support is a major focus, alongside sustaining support for other packaging operations. This position requires regular onsite presence and work in a cleanroom environment using required protective clothing and equipment, including coveralls, hoods, booties, safety glasses, and gloves. The role includes extended periods of standing or sitting while performing technical duties. Shift and coverage: Work a shift 8 compressed work week schedule on the front half of the week or back half of the week. The schedule will consist of three twelve-hour day/nights in a row followed by a four-day/night week every other week (Sunday-Tuesday every other Wednesday 12:00 p.m-12:30 a.m.) or (Thursday-Saturday every other Wednesday 12:00p.m-12:30am). Work in a clean room environment wearing coveralls hoods booties safety glasses and gloves as needed.