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Silicon Roles

Senior AE, SerDes Design IP

CadenceSAN JOSE$84,000–$156,000Analog & Mixed-Signal
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The published floor of $84,000 is 40% below the Analog & Mixed-Signal median of $138,900. First seen on this site 2026-09-22, open 4 days.
Posted 2026-09-17 · read from workday

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Cadence IP team develops industry leading IPs that enable customers in a variety of markets - from the endpoint to the edge to the cloud. At Cadence we’re helping set the standard on IP products that get integrated in SoCs that power the world’s Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to grow, no matter where you are in your career. We are growing our Serdes Applications team and we are looking for smart, energetic, collaborative and creative people to help us lead the industry with our IP products. At Cadence, we believe in embracing diverse ideas and striving for excellence in all that we do. Do you want to make a difference and be challenged? Join the High-Performance Culture at Cadence. As a Senior Applications Engineer, you will use your knowledge of different high-speed interface standards such as PCIe, CXL, Ethernet and USB to provide technical pre-sales support to win design IP business. Showcase the performance of the IP through demos at industry events. This role offers the benefit of both technical growth and business skill development. You will be part of the Technical Field Organization helping educate customers and providing solutions to them using our Serdes IP portfolio. As you grow into more senior roles, you will use your knowledge of different high-speed interface standards to architect solutions for customers using Cadence IPs.