CPU RTL Design Manager
Apply on Intel’s site →Job Details: Job Description: Intel's P-Core organization is seeking a highly experienced engineering manager to lead the Memory Execution Unit (MEU) Front-End development team responsible for delivering world-class CPU microarchitecture solutions for next-generation Server and Client products. The manager will own end-to-end execution of the MEU cluster across RTL Design, Design Verification, and Formal Verification, driving feature development from architecture definition through RTL implementation, pre-silicon validation, quality signoff, and silicon readiness. This role requires a strong technical leader who can build and grow a high-performing organization, drive execution excellence, influence cross-functional stakeholders, and deliver predictable first time-right silicon. Key Responsibilities Technical Leadership • Own end-to-end delivery of the MEU cluster across RTL, DV, and Formal Verification functions. • Drive microarchitecture reviews, implementation strategy, verification closure, and quality signoff. • Ensure delivery of features meeting Power, Performance, Area (PPA), Quality, Reliability, and Security objectives. • Define execution strategy, milestones, risk mitigation plans, and resource allocation. • Drive adoption of advanced methodologies, automation, AI-assisted debug, formal technologies, and verification innovations. People Leadership • Lead and grow an experienced team of RTL, DV, and Formal Verification engineers and technical leads. • Build leadership bench strength and succession plans.