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Silicon Roles

DFT Engineer 

GlobalfoundriesRichardson$106,000+Design for Test
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The published floor of $106,000 is 27% below the Design for Test median of $146,000. First seen on this site 2026-09-22, open 4 days.
Posted 2026-05-21 · read from workday

The DFT Engineer delivers hands-on expertise in designing and deploying advanced Design-for-Test solutions for semiconductor chip development. This role drives robust DFT architectures—including ATPG, MBIST, LBIST, and analog test solutions—while implementing optimized methodologies for rapid test pattern generation and efficient project delivery. Your Job Implement DFT architectures including ATPG, MBIST, LBIST, scan insertion, and analog test features under manager guidance. Execute test pattern generation and optimization to minimize test time while maximizing coverage and manufacturing yield. Apply standardized DFT methodologies and flows to deliver efficient, repeatable results across multiple projects. Integrate DFT requirements into RTL and physical design stages through collaboration with design, verification, and backend teams. Develop automation scripts (TCL, Python, Perl) for test pattern creation, validation, and analysis. Analyze test data from silicon bring-up and production to identify improvements and support root-cause debugging. Document DFT implementations, test results, and reuse IP for team knowledge sharing. Other Responsibilities Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering , Computer Engineering, or a related field. 4+ years of hands-on DFT experience on SoCs, including ATPG, MBIST, LBIST, and scan-based testing.