Hardware Engineer, Design Verification

NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), and London. THE ROLE Hybrid: 3 days a week in the office, in Mountain View, New York or London. As a Design Verification Engineer at Normal, you will verify our own physics-inspired ASICs from architecture through tapeout, and help set the bar for the AI-assisted verification flows we are building for ourselves. You will own verification of complex IPs and subsystems, develop reusable verification infrastructure, and establish methodologies that enable efficient, scalable verification across our silicon programs. You will also work closely with our architecture, RTL, and software teams to integrate AI-assisted tools into everyday verification workflows. The through-line is your DV expertise, applied to silicon that computes differently than anything you've verified before, and to the AI that is changing how verification gets done. This is a seat for a verification engineer who wants their craft to compound rather than repeat. WHAT YOU WILL OWN - ASIC Design Verification: Own end-to-end verification of Normal's internal ASICs, including verification planning, testbench development, assertions, functional coverage, regression, and coverage closure through tapeout.