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Silicon Roles

MTS Package engineer - ASIC package design, logic integration and design rules

MicronBoise, ID - Main Site$143,000+ASIC & SoC Architecture
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The published floor of $143,000 is 13% below the ASIC & SoC Architecture median of $165,000. First seen on this site 2026-10-29, open 12 days.
Posted 2026-10-29 · read from workday

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the team defining the future of packaging of complex memory systems! Our Package pathfinding and Architecture organization sits at the intersection of silicon, packaging, systems, and customer needs—turning complex scaling challenges into technologies that power next generation platforms, through cutting edge packaging technologies. If you enjoy working on problems with real industry impact, look no further! Key Responsibilities Partner with System Architects and engineering teams to define package architecture, connectivity, and electrical requirements . Develop block diagrams, schematics, and logical connectivity for system-in-package designs. Create and verify package netlists using schematic and automation-based design flows. Support ASIC/package co-design , including pad/bump maps, connectivity, and package integration. Evaluate package designs for electrical performance, manufacturability, reliability, and system requirements . Collaborate with Package Design and SI/PI teams to support physical and electrical implementation . Support integration of memory, ASICs/controllers, and other devices within complex package architectures. Support new and evolving interfaces such as LPDDR/DDR, ONFI, UFS, PCIe, and other high-speed protocols .