ASIC & SoC Architecture jobs

VLSI Design Automation Software Engineer

SMTS ASIC Digital Design

Sr Principal SoC DFT Engineer NEW

ASIC Design Engineer (Silicon Engineering)

ASIC/SOC DFT Engineer (Silicon Engineering)

ASIC/SOC DFT Engineer (Silicon Engineering)

FPGA/ASIC Design Engineer (Silicon Engineering)

FPGA/ASIC Design Engineer (Silicon Engineering)

Manager, ASIC Design Engineering (Starshield Silicon)

Principal ASIC Design Engineer (Starshield)

Security Analyst (SOC)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Starshield)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC DFT Engineer (Silicon)

Sr. ASIC DFT Engineer (Silicon)

Sr. ASIC DFT Engineer (Silicon)

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)

Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)

Senior ASIC Engineer

Core to Memory and I/O Engineer | SoC Power Thermal Performance Validation (Temporary position)

Power Thermal Validation and Power Management Engineer - SoC Power Thermal Performance Validation (Temporary position)

Power Delivery Integration and Power Rail Stress Engineer- SoC Power Thermal Performance Validation Engineer (Temporary position)

Microarchitecture and Design Engineer - AI SoC

Principal SoC Signoff Engineer

Senior SoC Architect, RAS

Senior ASIC Timing Engineer, DFT

SoC Design Verification Engineer

VLSI Timing Methodology Intern - Summer 2027

ASIC Design Engineer

Senior ASIC Design Engineer – Clocks IP

Senior ASIC Front End Infrastructure Engineer

SoC Product Architect, Memory Ecosystem

Senior Verification Engineer, SoC

SoC Manager, Performance Verification - Networking group

Sr Staff Engineer, SoC RTL Design

CPU and SOC Verification Engineer

ASIC Design Engineer, High Speed IO

ASIC Design Engineer, High Speed IO

Senior Verification Engineer - HSIO Cluster and SOC

Senior Software Engineer, VLSI

ASIC Physical Design Engineer - New College Graduate

Senior ASIC Design Engineer

Senior ASIC Design Engineer

Soc Design Verification Director

Sr. Principal Program Manager, ASIC Design

Staff Physical Design Engineer - SoC EMIR Engineer

Staff / Principal ASIC Design Engineer

Senior Silicon Architect – Cache Coherent Interconnects

NVIDIA 2027 Internships: Hardware Physical Design / VLSI

NVIDIA 2027 Internships: Hardware ASIC Design

ASIC Verification Intern - Summer 2027

ASIC Verification Engineer - New College Grad 2027

Low Power ASIC Engineer - New College Grad 2027

Senior ASIC Design Engineer - Memory Subsystem

Senior SoC Software Engineer

ASIC Clocks Verification Engineer - New College Grad 2026

SoC Software Engineer – New College Graduate 2026

Senior SoC Software Engineer

Senior VLSI Methodology Engineer

VLSI CAD Timing Intern, Applied AI - Summer 2027

Senior ASIC Timing Engineer

Senior Software Engineer - SOC Platforms

Applied Machine Learning Engineer, AI for VLSI Design - New College Grad 2026

ASIC Design Engineer - New College Grad 2027

ASIC Verification Engineer - New College Grad 2027

ASIC Verification Engineer, Memory Management - New College Grad 2027

PhD Research Intern, AI Accelerator Design and VLSI - 2027

Applied Machine Learning Engineer - AI for VLSI Design

Senior ASIC Design Verification Engineer - LPU

Senior System Firmware Engineer - SOC and GPU

ASIC Design Engineer – Clocks IP

Senior Architect, GPU and SoC Modeling

Principal Product Manager - Laptop GPU and SoC

ASIC Floorplan Design Engineer - New College Grad 2026

Senior Software R&D Engineer, ECO Route - VLSI EDA

Senior ASIC Verification Engineer

Senior ASIC Verification Engineer - HSIO

Senior ASIC Verification Engineer

Senior System Software Engineer - SoC Power

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

Senior System Software Engineer - CPU SoC Boot Firmware

Senior Manager, ASIC Chip Engineering

Senior ASIC Verification Engineer

Senior System Software Engineer, SoC Power and Performance - O-RAN Infrastructure

Senior System Software Engineer - CPU SoC Boot Firmware

ASIC Verification Engineer

Senior Architect, SOC Modeling

Manager, ASIC Chip - GPU

Principal SoC Architect, Robotics and Automotive

Senior ASIC Design Engineer

ASIC Design Engineer - New College Grad 2026

Principal Architect, SoC and Systems Modelling

Senior ASIC Design Engineer - DFT

Senior ASIC Physical Design Engineer, Netlisting

Senior AI Application Developer - GPU and SOC Architecture Modeling

Senior ASIC Floorplan Design Engineer

Senior SoC Subsystem and I/O Architect - LPU

ASIC Design Engineer - Hardware

SoC Verification Lead

Applied AI Engineer - VLSI Design

Senior ASIC Power Engineer

Senior ASIC Floorplan Design Engineer

ASIC Physical Design Engineer, Netlisting - New College Grad 2026

Senior ASIC Verification Engineer, Coherent High Speed Interconnect

Senior ASIC Verification Engineer - GPU

Senior ASIC Verification Engineer - GPU

ASIC Verification Engineer

Senior ASIC Verification Engineer

Senior ASIC Design Engineer

Senior Software R&D Engineer, VLSI Physical Design

GPU/SOC Low-Power Feature Architect