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Silicon Roles

PhD Research Intern, AI Accelerator Design and VLSI - 2027

NvidiaUS, CA, Santa ClaraASIC & SoC Architecture
Apply on Nvidia’s site →
First seen on this site 2026-09-30, open 9 days.
Posted 2026-09-29 · read from workday

NVIDIA Research is seeking PhD-level students to work as research interns at the intersection of AI HW/SW Co-Design, Hardware Accelerator Architecture, IC Design Methodology, and VLSI Design. Ideal candidates will have a broad perspective across areas including machine learning fundamentals, quantization and numerical methods for machine learning model optimization, digital VLSI circuits for computer arithmetic, high-productivity VLSI design and verification methodologies including applications of agentic AI to hardware design, AI hardware micro-architecture, and VLSI methodology and implementation. What You’ll Be Doing: Accelerator Design: Contribute to novel research advancing the state-of-the-art in the design of accelerators for AI and other high-impact workloads. VLSI: Research creative and innovative ASIC and VLSI design techniques and/or novel digital VLSI circuits. Apply machine learning, agentic AI, and state-of-the-art tools and methodologies to automated ASIC and VLSI design tool flows. AI HW/SW Co-Design: Research and develop creative and innovative numerical methods for quantization, sparsity, or tensor decomposition grounded in computer arithmetic fundamentals and digital VLSI circuits. Collaborate on the development of research prototype testchips. Collaborate with AI researchers and hardware team members in research and product teams. Plan to publish and present your original research. What We Need To See: Pursuing a PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.