Power Delivery Integration and Power Rail Stress Engineer- SoC Power Thermal Performance Validation Engineer (Temporary position)

Job Details: Job Description: As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level. In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges. Your contribution will directly impact Intel's ability to deliver competitive, high-performing products to market. This is a Temporary position (12 months) Key Responsibilities Develop and execute System-on-Chip (SoC)-level power delivery, Power Rails Stress (PRS), maximum current (ICCmax), current transient (di/dt), minimum/maximum voltage (Vmin/Vmax), Digital Linear Voltage Regulator (DLVR)/Fully Integrated Voltage Regulator (FIVR), and concurrency plans, including feasibility study and design/verification/simulation of the Power Distribution Network (PDN) and sign-off of IR-drop/Electromigration (IR/EM) metrics, across Intel products. Collaborate with architecture, design, firmware, software, Power Management architects, and layout teams to ensure power delivery meets competitive targets and specifications and to define and implement power gating solutions. Establish and execute methodologies for validating hardware/software optimizations and to converge the design on all Power Distribution Network (PDN) metrics, ensuring alignment with business Key Performance Indicators (KPIs).