Senior Design Verification Engineer - Hardware

NVIDIA MMPLEX team, located in Shanghai, consists of over 300 team members. We are dedicated to delivering cutting-edge IP solutions to various NVIDIA product lines, including datacenter, GeForce, automotive, networking, and more. Our IPs encompass a wide range of technologies such as micro-processors, security, DL/CV accelerators, display, video encoder/decoder, and image processor. As a Verification Engineer, you will play a crucial role in ensuring the quality and functionality of our hardware IPs. What you'll be doing: You will participate in the research of verification methodology to improve automation and productivity to produce Nvidia’s new high-quality products. Read IAS and design specs to understand the design requirement and build corresponding testplan. Review the testplan with arch/design engineers. You responses to build block/IP testbench based on UVM methodology. The responsibilities include building test run and regression flow. Triage failures in regression and help designer root cause the bug. Work includes Build various metrics (passing rate, functional coverage, etc) and monitor its health. Take SOC verification on fullchip test environment for IPs Analyse functional/code coverage result and identify the coverage holes. Work with design engineer to improve the coverage score. Deploy the advanced verification methodology and infrastructure of the SOC/IP What we need to see: MS in electrical / computer engineering or equivalent experience. 5+ years (MS) working experience.