Verilog jobs
219 open roles mention Verilog. Median advertised base $158,000 across 47 published ranges.
IP Design Verification Engineer
Intel · US, California, Santa Clara · 2026-11-09
$105,650+
SMTS ASIC Digital Design
Globalfoundries · Austin · 2026-11-09
no range
Engineer, FPGA Design Engineer NEW
Analogdevices · Romania, Cluj-Napoca, Decembrie · 2026-11-09
no range
Lead Digital Design Engineer NEW
Analogdevices · Ireland, Limerick · 2026-11-09
no range
Principal Design Verification Engineer (AI Fabric Switches)
Astera Labs · San Jose, California, United States · 2026-11-07
no range
AMS Verification Engineer (RFIC Engineering)
SpaceX · Redmond, WA · 2026-11-06
$125,000+
AMS Verification Engineer (RFIC Engineering)
SpaceX · Irvine, CA · 2026-11-06
$125,000+
ASIC Design Engineer (Silicon Engineering)
SpaceX · Palo Alto, CA · 2026-11-06
$135,000+
ASIC/SOC DFT Engineer (Silicon Engineering)
SpaceX · Austin, TX · 2026-11-06
no range
ASIC/SOC DFT Engineer (Silicon Engineering)
SpaceX · Palo Alto, CA · 2026-11-06
$135,000+
FPGA/ASIC Design Engineer (Silicon Engineering)
SpaceX · Redmond, WA · 2026-11-06
$125,000+
FPGA/ASIC Design Engineer (Silicon Engineering)
SpaceX · Irvine, CA · 2026-11-06
$125,000+
FPGA Engineer (Starshield)
SpaceX · Hawthorne, CA · 2026-11-06
$125,000+
Manager, ASIC Design Engineering (Starshield Silicon)
SpaceX · Hawthorne, CA · 2026-11-06
$190,000+
Principal ASIC Design Engineer (Starshield)
SpaceX · Hawthorne, CA · 2026-11-06
$200,000+
Principal DFT Engineer (Silicon Engineering)
SpaceX · Palo Alto, CA · 2026-11-06
$220,000+
Principal DFT Engineer (Silicon Engineering)
SpaceX · Austin, TX · 2026-11-06
no range
Principal DFT Engineer (Silicon Engineering)
SpaceX · Irvine, CA · 2026-11-06
$210,000+
Spring 2027 Silicon Engineering Internship/Co-op
SpaceX · Flexible - Any SpaceX Site · 2026-11-06
no range
Sr. ASIC Design Engineer (Silicon Engineering)
SpaceX · Irvine, CA · 2026-11-06
$165,000+
Sr. ASIC Design Engineer (Silicon Engineering)
SpaceX · Palo Alto, CA · 2026-11-06
$175,000+
Sr. ASIC Design Engineer (Silicon Engineering)
SpaceX · Austin, TX · 2026-11-06
no range
Sr. ASIC Design Engineer (Silicon Engineering)
SpaceX · Redmond, WA · 2026-11-06
$165,000+
Sr. ASIC Design Engineer (Starshield)
SpaceX · Hawthorne, CA · 2026-11-06
$160,000+
Summer 2027 Silicon Engineering Internship/Co-op
SpaceX · Flexible - Any SpaceX Site · 2026-11-06
no range
Verification Engineer, PCIE
Nvidia · India, Bengaluru · 2026-11-06
no range
Microarchitecture and Design Engineer - AI SoC
Intel · US, California, Santa Clara · 2026-11-06
$105,650+
DFT Engineer
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-11-06
no range
Sr/Staff Digital Design Engineer
Lightmatter · Mountain View, CA · 2026-11-06
$164,000+
Sr/Staff Digital Design Engineer
Lightmatter · Boston, MA · 2026-11-06
$154,000+
Sr/Staff Digital Design Engineer
Lightmatter · Toronto, ON · 2026-11-06
$123,000+
Physical Design Engineer
Baya Systems · Bengaluru, Karnataka, India · 2026-11-06
no range
Staff/Sr Staff Electro-Optic Link Codesign Engineer
Lightmatter · Boston, MA; Mountain View, CA · 2026-11-05
$180,000+
ASIC Design Engineer
Nvidia · US, CA, Santa Clara · 2026-11-04
no range
Senior ASIC Design Engineer – Clocks IP
Nvidia · US, CA, Santa Clara · 2026-11-04
no range
Digital Design Engineer, Coherent High Speed Interconnect - New College Graduate
Nvidia · Taiwan, Hsinchu · 2026-11-04
no range
Senior Digital System Architect
PsiQuantum · Palo Alto, California · 2026-11-04
$176,500+
Senior Verification Engineer, SoC
Nvidia · US, CA, Santa Clara · 2026-11-03
no range
SoC Manager, Performance Verification - Networking group
Nvidia · India, Bengaluru · 2026-11-03
no range
FPGA Associate (Summer 2027)
Astranis · San Francisco · 2026-11-03
no range
FPGA Associate (Winter 2027)
Astranis · San Francisco · 2026-11-03
no range
FPGA Engineer
Astranis · San Francisco · 2026-11-03
$140,000+
FPGA Intern (Summer 2027)
Astranis · San Francisco · 2026-11-03
no range
FPGA Intern (Winter 2027)
Astranis · San Francisco · 2026-11-03
no range
Senior FPGA Engineer
Astranis · San Francisco · 2026-11-03
$175,000+
Principal PCS/PMA RTL Design Engineer
Astera Labs · San Jose, California, United States · 2026-11-03
$185,000–$240,000
Sr Staff Engineer, SoC RTL Design
Tenstorrent · Toronto, Ontario, Canada · 2026-11-03
no range
Design Verification Engineer, New Grad
SambaNova · San Jose, California, United States · 2026-11-03
$120,000+
Senior ASIC Design Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-11-01
no range
Senior ASIC Design Engineer
Astera Labs · Haifa District, Israel · 2026-11-01
no range
Staff / Principal ASIC Design Engineer
Astera Labs · Haifa District, Israel · 2026-11-01
no range
Synthesis & STA Engineer – High-Speed SerDes
Astera Labs · San Jose, California, United States · 2026-11-01
$160,000–$200,000
Formal Verification Engineer - New College Graduate
Nvidia · Hungary, Budapest · 2026-10-31
no range
NVIDIA 2027 Internships: Hardware Engineering
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
NVIDIA 2027 Internships: Digital Circuit Design
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
NVIDIA 2027 Internships: Mixed Signal Design
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
NVIDIA 2027 Internships: Hardware ASIC Design
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Formal Verification Engineer - New College Grad 2027
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Verification Intern - Summer 2027
Nvidia · Canada, Toronto · 2026-10-30
no range
Senior FPGA Prototyping Engineer - Hardware
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior System Verification Engineer
Nvidia · US, TX, Austin · 2026-10-30
no range
Senior System Verification Engineer
Nvidia · US, TX, Austin · 2026-10-30
no range
ASIC Verification Engineer - New College Grad 2027
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Low Power ASIC Engineer - New College Grad 2027
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Engineer - Memory Subsystem
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Mixed Signal Circuit Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Design Engineer - New College Grad 2027
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Design Engineer – Clocks IP
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Principal EDA R&D Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Floorplan Design Engineer - New College Grad 2026
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
CPU Design Methodology Engineer
Nvidia · US, OR, Hillsboro · 2026-10-30
no range
Principal Photonics IC Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Physical Design Engineer, Cache Coherent Interconnects
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
RTL Power Optimization Engineer – New College Grad 2026
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Design Engineer - New College Grad 2026
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Engineer - DFT
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Memory Controller Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Formal Verification Engineer - New College Grad 2026
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
ASIC Design Engineer - Hardware
Nvidia · US, TX, Austin · 2026-10-30
no range
Senior Verification Engineer - Hardware
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Software R&D Engineer, RTL Optimization Tools
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Digital Design Engineer - High-Speed I/O and Photonics
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Floorplan Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Verification Engineer, Coherent High Speed Interconnect
Nvidia · Canada, Toronto · 2026-10-30
no range
Senior Design Verification Engineer - GPU Memory Subsystem
Nvidia · US, NC, Durham · 2026-10-30
no range
Senior Mixed Signal Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Verification Engineer - GPU
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Cell Modeling and Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Logic Design Engineer, Cache Coherent Interconnects
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Mixed-Signal Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Mixed Signal Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Mixed Signal Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Engineer - GPU
Nvidia · US, NC, Durham · 2026-10-30
no range
Senior Formal Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Cell Modeling and Verification Engineer - New College Grad 2026
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Analog and Mixed Signal Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior System Verification Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior ASIC Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Senior Mixed Signal Design Engineer
Nvidia · US, CA, Santa Clara · 2026-10-30
no range
Custom SOC ASIC Engineer - New College Grad 2027
Nvidia · China, Shanghai · 2026-10-29
no range
Firmware Engineer
Nvidia · China, Beijing · 2026-10-29
no range
Principal Silicon Verification Engineer
Graphcore · Bengaluru, India · 2026-10-29
no range
Senior Silicon Verification Engineer
Graphcore · Bengaluru, India · 2026-10-29
no range
Silicon DFT Engineer — Multiple Levels
Graphcore · Bristol, UK; Cambridge, UK · 2026-10-29
no range
Staff Silicon Verification Engineer
Graphcore · Bengaluru, India · 2026-10-29
no range
STA Physical Design Engineer, Senior Principal
Astera Labs · San Jose, California, United States · 2026-10-29
no range
Senior Chip Design Verification Engineer
Nvidia · Israel, Yokneam · 2026-10-28
no range
Analog Mixed Signal Design Engineer
Astera Labs · Singapore, Singapore · 2026-10-28
no range
DFT Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
$133,200–$185,000
Distinguished Formal Verification
Astera Labs · San Jose, CA · 2026-10-28
$230,000–$285,000
Formal Verification and RTL Design Software Engineer
Astera Labs · San Jose, California, United States · 2026-10-28
$160,500–$200,000
Lead Logic Design Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Lead Logic Design Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Principal Logic Design Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Principal Logic Design Engineer - UALink IP/Subsystem
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Principal Physical Design Engineer
Astera Labs · Ahmedabad, Gujarat, India · 2026-10-28
no range
Principal Physical Design Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Principal Physical Design Engineer, STA
Astera Labs · San Jose, California, United States · 2026-10-28
no range
Senior Analog Mixed-Signal IC Layout Engineer
Astera Labs · Singapore, Singapore · 2026-10-28
no range
Senior Digital Design Engineer
Astera Labs · Toronto, Ontario, Canada · 2026-10-28
$139,500–$155,000
Senior SoC Verification/Validation Engineer
Astera Labs · San Jose, CA · 2026-10-28
$165,000+
SoC Design Director
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Staff / Principal ASIC Design Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-10-28
no range
Tech Lead Analog Mixed-Signal IC Layout Engineer
Astera Labs · Singapore, Singapore · 2026-10-28
no range
Tech Lead ASIC Design Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-10-28
no range
Senior Verification Engineer
Fractile · London, UK · 2026-10-28
no range
Senior Engineer, RTL Design, AI Hardware
Tenstorrent · Belgrade, Serbia · 2026-10-26
no range
Staff Engineer, RTL Design, AI Hardware
Tenstorrent · Belgrade, Serbia · 2026-10-26
no range
Principal DFT Engineer
SambaNova · Austin, Texas, United States; San Jose, California, United States · 2026-10-26
$180,000+
Staff SoC Design Engineer
Quadric · Pune, Maharashtra, INDIA · 2026-10-26
no range
Staff SoC Design Engineer
Quadric · Burlingame, CA (HQ) · 2026-10-26
$170,000–$230,000
Staff SoC Design Engineer
Quadric · Canada · 2026-10-26
$170,000–$230,000
FPGA RF Signal Processing Engineer
Muon Space · San Jose, CA · 2026-10-25
$190,000–$212,000
Senior FPGA Engineer, Networking & Security
Muon Space · San Jose, CA · 2026-10-25
$213,000–$237,000
Senior FPGA RF Signal Processing Engineer
Muon Space · Remote · 2026-10-25
$158,000+
Engineer/Senior Engineer in Product Engineering, NAND Validation/Characterization
Micron · MSB, Singapore · 2026-10-24
no range
Mixed-Signal Design Engineer – RTL and Co-Simulation
Nvidia · India, Bengaluru · 2026-10-24
no range
Engineer/Senior Engineer in Product Engineering, NAND Validation/Characterization
Micron · MSB, Singapore · 2026-10-23
no range
Principal Engineer, ASIC Validation
Micron · Hyderabad - Phoenix Aquila, India · 2026-10-23
no range
Verification Engineer, Memory Subsystem
Nvidia · India, Bengaluru · 2026-10-23
no range
Senior Verification Engineer, Memory Subsystem
Nvidia · India, Bengaluru · 2026-10-23
no range
Verification Engineer - PCIE
Nvidia · India, Bengaluru · 2026-10-23
no range
Verification Engineer - PCIE
Nvidia · India, Bengaluru · 2026-10-23
no range