Senior Design Verification Engineer - Interconnect IP

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! What you’ll be doing: Responsible for verifying the ASIC design, architecture and micro-architecture of the GPU memory subsystem unit using advanced verification methodologies. Expected to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. Come up with test plans, tests and verification infrastructure for complex IPs/sub-systems. Responsible for performance and deadlock verification of the GPU memory subsystem unit. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Perform functional coverage driven verification closure.