Senior Power Integrity Methodology CAD Engineer

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for a Senior Power Integrity Methodology CAD Engineer. What you'll be doing: Developing physical design methodologies for rail analysis and signoff. Responsible for coming up with unique and creative solutions for pioneering IR analysis and signoff that are needed for NVIDIA chips. Crafting workflows and tool methodologies for power and noise analysis across multiple projects. What we need to see: Master's degree or equivalent experience in Electrical Engineering or related field. Minimum 10 +years of experience in EMIR flow methodology development and support. Strong understanding of all aspects of EMIR analysis and signoff. Familiar with hierarchical design approach and hierarchical signoff. Experience with shift-left methodologies for EMIR optimization and convergence earlier in the chip build cycle.