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Silicon Roles

Sr. Principal Program Manager, ASIC Post-Silicon Engineering

Astera LabsSan Jose, California, United States$205,000–$250,000Silicon Validation & Bring-upASIC & SoC Architecture
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The published floor of $205,000 is exactly at the Silicon Validation & Bring-up median of $205,000. First seen on this site 2026-08-10.
Posted 2026-08-03 · read from greenhouse

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . Role Overview Astera Labs is seeking a S r. Principal Program Manager, ASIC Post-Silicon Engineering to lead execution of complex post-silicon programs for AI connectivity products. This role owns cross-functional program delivery from silicon power-on through bring-up, validation, qualification, customer sampling, and release to manufacturing - RTM, aligning engineering execution with product, customer, and business milestones. The ideal candidate brings deep experience leading technically complex semiconductor or systems programs involving silicon, firmware, software, platform, validation, manufacturing, and customer readiness. They are highly effective at driving cross-functional alignment, managing program risk, and communicating crisply with both engineering teams and executive stakeholders.