Chip Lead / Physical Design Director

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are excited to welcome highly talented Physical Design Architects and Chip Leads to join our Cadence Performance Solutions Group (PSG). Working at Cadence means collaborating with some of the industry’s brightest minds and driving innovation for the world’s most advanced companies. Through Cadence’s tools, emulation hardware, and IP products, we have supported a diverse range of customers. Enabling products in data centers, advanced driver-assistance system (ADAS) automotive and physical AI, and cutting-edge artificial intelligence verticals. As an expert Physical Design Architect, you will engage directly with our leading-edge customers to deliver differentiated RTL-to-GDS services in advanced FinFET nodes. You will lead a talented Physical Design team with the goal of not only meeting but exceeding customers’ demanding Performance, Power, Area, and Schedule (PPAS) targets. At Cadence, our customers are at the heart of everything we do, and talented leaders like you are essential to turning this passion into tangible results. Key Responsibilities Serve as the technical leader for Physical Design and Design for Test teams, driving complex customer SoC projects from RTL or Netlist to GDS. These critical SoCs are targeted for markets such as data centers, automotive, and artificial intelligence.