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Silicon Roles

Static Timing Analysis jobs

361 open roles mention Static Timing Analysis. Median advertised base $165,600 across 74 published ranges.

New College Grad - HBM SoC Design Engineer/Architect
Micron · Folsom, CA · 2026-09-25
$79,000+
New College Grad - Mixed Signal Design Engineer, HBM
Micron · Richardson, TX · 2026-09-25
no range
Principal Physical Design Engineer / Physical Design – ACE US NEW
Nxp · Austin (Oakhill, Office) · 2026-09-25
no range
Director - STA NEW
Nxp · Austin (Oakhill, Office) · 2026-09-25
no range
Director of SoC Implementation / Physical Design NEW
Nxp · Austin (Oakhill, Office) · 2026-09-25
no range
Lead STA Engineer NEW
Nxp · Bangalore · 2026-09-25
no range
Sr. Staff Physical Design Engineer
Lightmatter · Boston, MA · 2026-09-25
$217,000+
Sr. Staff Physical Design Engineer
Lightmatter · Mountain View, CA · 2026-09-25
$220,000+
Sr. Staff Physical Design Engineer
Lightmatter · Toronto, ON · 2026-09-25
$191,000+
Principal ASIC Design Engineer NEW
Micron · Boise, ID - Main Site · 2026-09-24
$186,000+
Staff Engineer, ASIC STA NEW
Micron · Bengaluru, India · 2026-09-24
no range
Staff Engineer, ASIC IP STA NEW
Micron · Bengaluru, India · 2026-09-24
no range
Sr. Manager, Digital Design
Analogdevices · India, Hyderabad · 2026-09-24
no range
Physical design CAD engineer NEW
Marvell · Yokneam · 2026-09-24
no range
Distinguished ASIC Design Engineer
Astera Labs · Germany (Onsite) · 2026-09-24
no range
Senior Principal ASIC Design Engineer
Astera Labs · Germany (Onsite) · 2026-09-24
no range
AI/ML Physical Design Flow Engineer
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Chiplet Physical Design Engineer
Tenstorrent · Santa Clara, California, United States · 2026-09-24
no range
Physical Design CPU Methodology Engineer
Tenstorrent · Santa Clara, California, United States · 2026-09-24
no range
Physical Design Engineer
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Physical Design Engineer, AI Accelerator IP
Tenstorrent · Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada · 2026-09-24
no range
Physical Design Engineer: Die-to-Die Interface (RTL to GDSII)
Tenstorrent · Santa Clara, California, United States · 2026-09-24
no range
Physical Design Engineer, ML4PD
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Physical Design Engineer, PnR
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Physical Design Engineer - STA
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Physical Design Engineer, Timing
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Sr Staff Engineer, SoC RTL Design
Tenstorrent · Toronto, Ontario, Canada · 2026-09-24
no range
Staff Engineer, Physical Design
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Top Level Physical Design Engineer
Tenstorrent · Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States · 2026-09-24
no range
Staff Engineer, CAD PD/STA
Micron · Hyderabad - Phoenix Aquila, India · 2026-09-23
no range
Senior Speed Characterization Engineer - Silicon Co-Design Group
Nvidia · US, CA, Santa Clara · 2026-09-23
no range
Physical Design Backend Engineer
Nvidia · Israel, Yokneam · 2026-09-23
no range
Senior SRAM Engineer, Circuit Design
Nvidia · US, CA, Santa Clara · 2026-09-23
no range
Digital Design Engineer
Analogdevices · India, Hyderabad · 2026-09-23
no range
Senior Digital Design Engineer
Analogdevices · India, Hyderabad · 2026-09-23
no range
Senior Digital Design Engineer
Analogdevices · India, Hyderabad · 2026-09-23
no range
Senior Digital Design Engineer
Analogdevices · India, Hyderabad · 2026-09-23
no range
Senior Physical Design Engineer NEW
Intel · US, Oregon, Hillsboro · 2026-09-23
$141,910+
Qubit Control Physical Design Engineer
Intel · US, Oregon, Hillsboro · 2026-09-23
$141,910+
Physical Design for PPA Optimization Engineer
Intel · Israel, Haifa · 2026-09-23
no range
DFT Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-09-23
$133,200–$185,000
DFT Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Director, Physical Design
Astera Labs · Hyderabad, Telangana, India · 2026-09-23
no range
Junior Physical Design Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Manager Design Verification
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Manager, Digital Design
Astera Labs · San Jose, California, United States · 2026-09-23
$216,000–$240,000
Physical Design Engineering, VP
Astera Labs · San Jose, California, United States · 2026-09-23
$250,600–$375,000
Physical Design Student
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Principal DFT Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Principal Digital Design Engineer
Astera Labs · San Jose, California, United States · 2026-09-23
$185,000+
Principal Digital Design Engineer
Astera Labs · San Jose, CA · 2026-09-23
$185,000–$230,000
Principal Digital Design Engineer
Astera Labs · San Jose, California, United States · 2026-09-23
$185,000+
Principal Digital Design Engineer
Astera Labs · Taipei, Taiwan · 2026-09-23
no range
Principal Digital Design Engineer (AI Fabric)
Astera Labs · San Jose, CA · 2026-09-23
$185,000+
Principal Physical Design Engineer
Astera Labs · San Jose, California, United States · 2026-09-23
$185,000–$240,000
Principal Physical Design Engineer -EMIR & Power Integrity
Astera Labs · San Jose, California, United States · 2026-09-23
$185,000–$240,000
Principal Physical Design Engineer, Methodology
Astera Labs · San Jose, California, United States · 2026-09-23
$185,000–$240,000
Principal Physical Design Engineer, STA
Astera Labs · San Jose, California, United States · 2026-09-23
no range
Principal/ Sr Principal Digital Design Engineer
Astera Labs · Taipei, Taiwan · 2026-09-23
no range
Principal/ Sr.Principal Digital Design Engineer
Astera Labs · San Jose, California, United States · 2026-09-23
$185,000–$230,000
Senior Digital Design Engineer
Astera Labs · Toronto, Ontario, Canada · 2026-09-23
$139,500–$155,000
Senior Engineer PD
Astera Labs · Singapore, Singapore · 2026-09-23
no range
Senior Principal Digital Design Engineer
Astera Labs · San Jose, CA · 2026-09-23
$205,000–$255,000
Senior STA Engineer
Astera Labs · Ahmedabad, Gujarat, India · 2026-09-23
no range
Senior/ Staff Physical Design Engineer
Astera Labs · Haifa District, Israel · 2026-09-23
no range
SoC Design Director
Astera Labs · Bengaluru, Karnataka, India · 2026-09-23
no range
Sr. Principal Program Manager, ASIC Design
Astera Labs · Toronto, Ontario, Canada · 2026-09-23
no range
Staff DFT Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Staff Physical Design Engineer - SoC EMIR Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Staff/ Principal Chip Top Physical Design Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Staff/ Principal Physical Design CAD Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Staff/ Principal Physical Design Engineer - SoC EMIR Expert
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
Staff/ Principal Physical Design STA Engineer
Astera Labs · Tel Aviv-Yafo, Tel Aviv District, Israel · 2026-09-23
no range
STA Physical Design Engineer, Senior Principal
Astera Labs · San Jose, California, United States · 2026-09-23
no range
Tech Lead ASIC Design Engineer
Astera Labs · Bengaluru, Karnataka, India · 2026-09-23
no range
Tech Lead, Physical Design
Astera Labs · Bengaluru, Karnataka, India · 2026-09-23
no range
Tech Lead, STA
Astera Labs · Hyderabad, Telangana, India · 2026-09-23
no range
Technical Lead Physical Design Engineer
Astera Labs · Toronto, Ontario, Canada · 2026-09-23
$140,000+
RTL SoC Design Intern
Quadric · Burlingame, CA (HQ) · 2026-09-23
no range
Physical Design Engineer
Micron · Jalisco, Mexico · 2026-09-22
no range
Silicon Validation Engineer
Nvidia · US, CA, Santa Clara · 2026-09-22
no range
Senior DFT Power Methodology Engineer
Nvidia · US, CA, Santa Clara · 2026-09-22
no range
Senior DFT Engineer
Nvidia · US, CA, Santa Clara · 2026-09-22
no range
Physical Design and Timing Engineer Intern - Summer 2027
Nvidia · US, CA, Santa Clara · 2026-09-22
no range
Senior ASIC Design Engineer – Clocks IP
Nvidia · US, CA, Santa Clara · 2026-09-22
no range
STA Engineer
Nvidia · Israel, Yokneam · 2026-09-22
no range
Senior Engineer, Digital Design Engineering
Analogdevices · Turkey, Istanbul, Bilisim Vadisi · 2026-09-22
no range
Senior Physical Design Engineer
Analogdevices · Ireland, Limerick · 2026-09-22
no range
Principal Physical Design Engineer
Analogdevices · Ireland, Limerick · 2026-09-22
no range
Digital Design (Physical) Engineer
Analogdevices · China, Beijing, Haidian, Xixiaokou · 2026-09-22
no range
Sr Staff DFT Engineer
Globalfoundries · IND - Karnataka - Bengaluru - North · 2026-09-22
no range
E-core CPU Physical Design Engineer
Intel · Malaysia, Penang · 2026-09-22
no range
E-core CPU Physical Design Engineer
Intel · Malaysia, Penang · 2026-09-22
no range
Principal Photonic Device Design Engineer
IonQ · Santa Barbara, California, United States · 2026-09-22
$212,000+
ASIC Design Engineer – Clocks IP
Nvidia · US, CA, Santa Clara · 2026-09-21
no range
Principal Digital Design Engineer
Nxp · Glasgow · 2026-09-21
no range
FPGA and Emulation Prototyping Engineer - MCU
Nxp · Catania · 2026-09-21
no range
Senior Digital Design Engineer - MCU
Nxp · Catania · 2026-09-21
no range
Senior FPGA Engineer
indie Semiconductor · Cordoba, Argentina; Buenos Aires, Argentina; Toronto, Canada · 2026-09-21
no range
Senior ASIC Design Engineer - DFT
Nvidia · US, CA, Santa Clara · 2026-09-18
no range
Senior DFT Methodology Engineer
Nvidia · US, CA, Santa Clara · 2026-09-18
no range
Senior AI STA Engineer, Sub-chip
Nvidia · Israel, Yokneam · 2026-09-18
no range
Staff Engineer – DFT Engineering
Analogdevices · India, Bangalore, RMZ · 2026-09-18
no range
Director, Digital Design
Analogdevices · India, Bangalore, RMZ · 2026-09-18
no range
Principal Digital Design Engineer
Nxp · Chandler (Office) · 2026-09-18
no range
Senior DFT Engineer
Nvidia · US, CA, Santa Clara · 2026-09-17
no range
Senior ASIC Physical Design Engineer, Netlisting
Nvidia · US, CA, Santa Clara · 2026-09-17
no range
Senior Circuit Silicon Correlation DFT Engineer
Nvidia · India, Bengaluru · 2026-09-17
no range
Senior CPU Logic Design Engineer
Intel · Israel, Haifa · 2026-09-17
no range
Senior Hardware Engineer - Micro-Architect
Quadric · Burlingame, CA (HQ) · 2026-09-17
$150,000–$220,000
Staff SoC RTL Engineer
Quadric · Burlingame, CA (HQ) · 2026-09-17
$170,000–$230,000
Senior VLSI Library Methodology Engineer
Nvidia · US, CA, Santa Clara · 2026-09-16
no range
Principal Physical Design Engineer - MCU
Nxp · Catania · 2026-09-16
no range
Intern - HBM SoC Physical Design Engineer
Micron · Folsom, CA · 2026-09-15
no range
Senior Engineer, Digital Design Engineering
Analogdevices · China, Shanghai, Pudong, ZuChongzhi · 2026-09-15
no range
Internship: Digital Design F/M
Nxp · Catania · 2026-09-15
no range
Timing & Power Analysis CAD Engineer
Marvell · Bangalore · 2026-09-15
no range
DFT Engineer
Graphcore · Bristol, UK; Cambridge, UK · 2026-09-15
no range
Intern - PHY Digital Design & Automation Engineer, HBM
Micron · Richardson, TX · 2026-09-14
no range
Senior ASIC Timing Engineer
Nvidia · US, CA, Santa Clara · 2026-09-14
no range
Senior Digital Design Engineer
Analogdevices · Ireland, Limerick · 2026-09-14
no range
Principal Product Engineer – High-Speed IP SerDes
Cadence · GYEONGGI-DO (Seoul) · 2026-09-14
no range
Principal RTL Design Engineer, IO & Memory Systems
SambaNova · Austin, Texas, United States; San Jose, California, United States · 2026-09-14
$180,000+
Physical Design Engineer (Silicon Engineering)
SpaceX · Palo Alto, CA · 2026-09-11
$135,000+
Physical Design Engineer (Silicon Engineering)
SpaceX · Austin, TX · 2026-09-11
no range
Physical Design Engineer (Silicon Engineering)
SpaceX · Irvine, CA · 2026-09-11
$125,000+
CPU Circuit Design Engineer
Intel · India, Bangalore · 2026-09-11
no range
SoC Physical Design Senior Manager, HBM
Micron · Folsom, CA · 2026-09-10
$177,000+
Principal Physical Design Engineer
Nxp · Hyderabad · 2026-09-10
no range
Principal RTL Design Engineer
SambaNova · Austin, Texas, United States; San Jose, California, United States · 2026-09-10
$180,000+
Senior Digital Design Engineer
Nxp · Austin (Oakhill, Office) · 2026-09-09
no range
Lead Physical Design Engineer
Fractile · London · 2026-09-09
no range
Lead Physical Design Engineer
Fractile · Bristol · 2026-09-09
no range
Lead RTL Designer (PPA Experience)
Fractile · London or Bristol · 2026-09-09
no range
Senior/Principal DFT Engineer
Fractile · Bristol · 2026-09-09
no range
Senior/Principal Physical Design Engineer
Fractile · Bristol · 2026-09-09
no range
Senior/Principal Physical Design Engineer
Fractile · London · 2026-09-09
no range
Associate Digital Design Engineer
Analogdevices · Philippines, Cavite (jp) · 2026-09-08
no range
Senior Digital Design Engineer - MCU
Nxp · Catania · 2026-09-07
no range
SOC DFT Intern - Spring 2027
Nxp · Austin (Oakhill, Office) · 2026-09-07
no range
SOC DFT Intern - Summer 2027
Nxp · Austin (Oakhill, Office) · 2026-09-07
no range
Junior Physical Design Engineer - MCU
Nxp · Catania · 2026-09-07
no range
Lead RTL Designer (PPA Experience)
Fractile · Bristol - The Crescent · 2026-09-07
no range
Principal DFT Engineer
SambaNova · Austin, Texas, United States; San Jose, California, United States · 2026-09-06
$180,000+
Senior Hardware Design Engineer
SambaNova · Austin, Texas, United States; San Jose, California, United States · 2026-09-06
$120,000+
Senior RTL Design Engineer
SambaNova · Austin, Texas, United States; San Jose, California, United States · 2026-09-06
$120,000+
Senior Physical Design and Timing Engineer
Nvidia · US, MA, Westford · 2026-09-04
no range
ASIC Design and Verification Intern, SOC - 2027
Nvidia · China, Shanghai · 2026-09-04
no range
Physical Design Engineer, Synthesis and Implementation
Nvidia · US, MA, Westford · 2026-09-04
no range
Senior Physical Design Engineer
Nvidia · US, MA, Westford · 2026-09-04
no range