EDA Methodology Architect

NVIDIA's success builds on a foundation of industry leading hardware. We achieve distinction through extensive design optimization, including combining the best of external EDA with highly optimized, internal EDA tools. Our team develops these tools by fusing advances in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU, CPU and SoC designs. You should have deep, hands‑on experience across the full RTL2GDS flow, with expertise in key stages such as RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff. Creativity and self-drive to explore is required. Our engineers enjoy unusually high intellectual freedom and the ability to explore broad roles. If you like to work across many technical areas and see your successes directly realized in the world's best AI hardware, it does not get any better than this! What you’ll be doing: Working directly with core P&R engine developers to define real‑world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, QoR, and scalability. Defining and rolling out next‑gen flows, including refactoring legacy flows and consolidating ad‑hoc solutions into scalable, maintainable frameworks used across multiple design teams. Designing and running rigorous A/B and multi‑variant experiments to compare flows, engines, and tool settings.