IP Design Verification Engineer

Job Details: Job Description: About the Role Join our Logic Design and Validation group within the Design Technology Platforms department, where you'll play a key role in shaping the future of semiconductor technology. You'll be part of a dynamic team responsible for developing RTL models and pre-silicon validation tests for test chips on next-generation silicon manufacturing processes. This is an opportunity to work at the cutting edge of chip design, collaborating across multidisciplinary teams to deliver robust, high-quality silicon. What You'll Do What You'll Do Design & Develop Verification Environments – Build and maintain scalable, reusable UVM-based testbenches and test cases for complex mixed-signal CMOS designs at the block, subsystem, and SoC levels. Define Verification Strategy – Own and drive comprehensive verification plans for complex digital systems, ensuring thorough coverage closure across multiple projects. RTL Development & Integration – Develop RTL designs and integrate logic components into SoC architectures, collaborating with IP providers to validate IPs at the system level. Power Methodology – Develop and implement power verification methodologies for complex mixed-signal IPs using industry-standard frameworks. Assertion-Based Verification – Create and apply SystemVerilog Assertions (SVA) to strengthen coverage closure and improve overall verification quality. Debug & Root Cause Analysis – Identify, debug, and resolve pre-silicon failures, implementing corrective measures and driving issues to closure.