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Silicon Roles

New College Grad - Engineer, ASIC Digital Design

MicronMinneapolis, MN$86,000–$146,000RTL DesignASIC & SoC Architecture
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The published floor of $86,000 is 49% below the RTL Design median of $167,000. First seen on this site 2026-09-18, open 8 days.
Posted 2026-09-17 · read from workday

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's ASIC Logic Design team develops next-generation ASICs and controller IP that enable industry-leading memory solutions. Working across advanced process technologies, the team collaborates with architecture, analog, verification, physical design, and validation engineers to deliver high-performance, production-ready silicon for future DRAM products. As an ASIC Digital Design Engineer, you will contribute to the design and development of RTL for next-generation DRAM memory controllers and subsystems. You will work in a collaborative engineering environment supporting design implementation, simulation, validation, and chip bring-up activities while leveraging AI-enabled tools to improve productivity and design quality. Responsibilities Design and develop RTL for DRAM memory controllers and subsystem components using SystemVerilog. Collaborate with analog, verification, physical design, validation, and other cross-functional teams to support successful product development. Develop and validate HDL models, support simulation and co-simulation activities, and analyze design functionality and performance. Support chip bring-up, debugging, and validation activities to identify and resolve design issues.