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Silicon Roles

Physical Design and CAD Engineer

Astera LabsSan Jose, California, United States$160,000–$200,000Physical DesignEDA & CAD
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The published floor of $160,000 is 10% below the Physical Design median of $177,500. First seen on this site 2026-11-07, open 3 days.
Posted 2026-11-06 · read from greenhouse

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com . About the Role As a Physical Design & CAD Engineer , you will serve as a Technical Lead developing Astera Labs’ next-generation connectivity ASICs for cloud and AI infrastructure. This role combines Physical Design CAD methodology development with hands-on place-and-route (PNR) implementation. You will develop and optimize automated design flows for advanced process nodes while contributing to block-level physical design, timing closure, and GDSII signoff. You will collaborate with cross-functional engineering teams to improve design efficiency, automation, and silicon implementation. What You'll Do Develop and maintain Physical Design CAD flows and methodologies for advanced process nodes. Build automation frameworks using Python and Tcl to support synthesis through signoff.