Principal DFT Engineer, HBM

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal SoC DFT Engineer within the Heterogeneous Integration Group (HIG), you will be responsible for the DFT architecture, implementation, and signoff of complex HBM base-die System-on-Chip (SoC) designs. This role is part of the SoC execution team, working closely with RTL design, verification, physical design, and product engineering to ensure robust, scalable, and manufacturable test solutions from pre-silicon development through tapeout and product bring-up. (LLM) Responsibilities will include, but are not limited to: Own SoC-level DFT implementation, including scan, MBIST, LBIST (as applicable), boundary scan (JTAG), and test access architectures for HBM base-die designs. Drive DFT architecture definition early in the design cycle, ensuring alignment with SoC integration, floor planning, timing, power, and physical design constraints. Implement and integrate DFT logic at the block, subsystem, and full-chip levels, working closely with RTL and integration teams. Own DFT flow execution and signoff, including lint, CDC, DFT rule checks, ATPG readiness, and coverage closure. Collaborate with physical design teams to ensure DFT solutions are optimized for placement, routing, timing closure, and DRC/LVS signoff.