Principal RTL Design Engineer

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale. SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets. About the team SambaNova's RDU is the processor behind our inference systems, and the RTL design team builds the blocks it's made of: compute datapath, on-chip network, and memory subsystems. The team owns microarchitecture through tape-out, including RTL implementation, PPA trade-offs, quality gates like lint, CDC, and LEC, and timing closure with physical design. Frequency targets are aggressive, so how a datapath gets pipelined and where area buys timing are decided here. About the role SambaNova Systems is looking for a Principal RTL Design Engineer to own the microarchitecture and RTL for a major block or subsystem of our next-generation Reconfigurable Dataflow Unit, the silicon behind our AI workload acceleration systems.