Principal SoC Signoff Engineer

Title : Principal Engineer, SOC signoff About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Principal Engineer, SoC Signoff has a deep understanding about how timing constraints are to be written across functional and test modes. They not only leads but mentors engineers towards designing and delivering full chip, complex Ips, and critical interface multi-mode timing constraints. This role drives the creation of constraints for custom integrated circuits (ICs) from specifications, co-ordinate across stake holding teams not only to create constraints and validate them, but also define margin methodologies and develop process for every SoC design we develop at MIPS Your Job Lead and own all phases of timing-constraint development for complex SoCs and digital, AMS, and SerDes IPs. Define signoff margins for ASIC implementation and static timing analysis (STA), from specification through production. Establish processes for multi-voltage and dynamic voltage and frequency scaling (MV/DVFS) STA signoff, and develop shift-left methodologies for STA. Provide technical mentorship to a high-performing engineering team, including recent graduates.