RTL Lead

NORMAL COMPUTING | BUILD WITH US Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), and London. THE ROLE Hybrid: 3 days a week in the office, in Mountain View, New York or London. As a Lead RTL Design Engineer at Normal, you will lead and own the design of the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence. You will lead and own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers fully test the design using conventional and formal methods, and working closely with physical design to make sure the design meets area and timing constraints. As a Lead, you will help with hiring, create and refine the design methodology, organize the design team around schedule and track progress. Because Normal's chips are not standard accelerators, the Lead RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it.