Senior ASIC Floorplan Design Engineer

NVIDIA is seeking an experienced ASIC Floorplan Engineer to design and implement the world's leading SOCs, CPUs, and GPUs. This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC from early architecture development phase through physical design phase, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you will be doing: From the early chip definition phase you will partner closely with a wide variety of multi-disciplinary teams starting including product managers, chip architects, ASIC design, physical design, packaging teams among others to craft the chip floorplan that optimizes cost/area, performance, and power for a target market Drive the floorplan development and collaborate with the ASIC and Physical design teams to identify and solve area, interconnect, timing, and floorplan improvement opportunities to achieve optimal product features and cost Develop AI workflows and productivity tools to continually improve existing infrastructure for optimizing chip area and speed of execution Identify key technical and product risks and work with engineering and management teams to close on risk mitigation strategies among the options What we need to see:…