Senior Full-Chip RTL Integration Engineer
Apply on Nvidia’s site →Come be a part of new process technology adoption by joining NVIDIA's Advanced Technology Group! We are looking for a Full-Chip RTL Integration Engineer to join our dynamic and growing FE-ASIC development team. In this role, you will be responsible for integrating complex IPs and subsystems into large-scale SoCs while ensuring design quality, verification readiness, and DFT compliance. You will work closely with Architecture, Design, Verification, DFT, and Physical Design teams to deliver high-quality silicon products in a collaborative and fast-paced environment. If you are a problem solver and highly motivated individual searching for a collaborative and exciting role, join us today! We encourage applicants with a history of proven success working in a multicultural and diverse environment. What you'll be doing: Lead RTL integration of multiple internal and third-party IPs into complex ASIC/SoC designs, owning top-level connectivity, clocking, reset architecture, address mapping, and power domain integration. Work closely with Architecture, RTL Design, Verification, DFT, and Physical Design teams to drive system-level integration and design closure. Perform RTL quality checks including lint, CDC, RDC, synthesis, and connectivity validation. Develop and carry out integration-level verification plans using SystemVerilog/UVM, debug simulation failures, and support functional coverage closure.