Sr. Design for Test (DFT) Engineer

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! We are hiring a Sr DFT Engineer to help us build high-performance ASICs for the next generation of AI acceleration systems. In this role, you will be responsible for physical design in leading-edge CMOS technology. This includes synthesis through place and route, timing closure, and tape-out signoff. Responsibilities Perform Design For Test (DFT) insertion on ASIC designs, including internal scan, boundary scan, and memory BIST Perform automatic and targeted test pattern generation Interface with Physical Design and Front End (RTL) Design Perform post-silicon DFT bring-up and test program debug Interface with ATE engineers for test program bring-up and debug Scripting and automation of DFT and ATPG flow Be hands-on from the "nitty gritty" details to high level planning.