Staff Physical Verification Engineer

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X . Role We are seeking a Staff Physical Verification Engineer to own full-chip signoff for advanced SoC/ASIC designs, with end-to-end responsibility from block-level checks to final tape-out. You will lead methodologies and execution for DRC, LVS, PERC and related reliability checks, working closely with Place-n-route, analog/mixed-signal, timing analysis and CAD teams to ensure first-time-right silicon. Key Responsibilities - Own full-chip and block-level physical verification signoff, including DRC, LVS, ERC, PERC and antenna/ESD checks for multiple complex SoCs. - Drive tape-out readiness: manage PV schedules, track violations, converge to zero/signoff-acceptable errors, and deliver clean GDS. - Develop, maintain, and optimize PV flows and scripts (e.g., Calibre, ICV) for performance, robustness, and ease of use.