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Silicon Roles

Principal Engineer, ASIC Validation

MicronHyderabad - Phoenix Aquila, IndiaASIC & SoC Architecture
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First seen on this site 2026-10-23, open 18 days.
Posted 2026-10-23 · read from workday

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job responsibilities At Glance: Complete HANDS On Xilinx FPGA Flow, Vivado Flow and Protocompiler Tool flow or ZEBU Emulation flow is Essential to Have Overall ownership of complete SOC deployment on Pre Silicon platforms on ZEBU Get along with Design/SOC C/FW teams to identify actual FW implementation and plan/perform validation accordingly Review SoC Verification plan for PCIe/LPDDR/ONFI sub system and Create/understand PCIe/LPDDR/ONFI Validation plan with SOC C, AE, FW teams Develop understanding on SoC and perform Processor based SoC prototyping and Emulation using C/FW/AE Flow Should be able to run SOC C based simulations for test case understanding and debug using VCS Hands on HAPS 100, HAPS200, ZEBU, Palladium is most preferred, Hands on ZEBU is MUST to have Work with overseas teams for PCIe/LP bring-up/debug Should be writing the Verilog RTL when required, should be able to debug using Xilinx FPGA Vivado Flow Proficiency in FPGA Debug Skills Must have practical experience with Xilinx FPGA debug using Chipscope flow Strong root-cause skills across hardware, RTL layers Job Qualifications Bachelors/Masters or equivalent experience in Engineering Thorough Knowledge of ZEBU or Palladium Flow, Xilinx Ultrascale FPGA, Vivado Flow would be preferred.