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Silicon Roles

Staff Engineer, ASIC Digital Design

MicronMinneapolis, MN$150,000+RTL DesignASIC & SoC Architecture
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The published floor of $150,000 is 8% below the RTL Design median of $162,250. First seen on this site 2026-10-30, open 11 days.
Posted 2026-10-29 · read from workday

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Digital Design Engineer in Micron’s ASIC logic design team, you will be engaged in the design of the next generation of Micron's internally developed ASICs and controller IP. The ideal candidate will be a driven individual, with strong RTL design skill and a solid understanding of the ASIC development flow, can provide leadership to other engineers, and is looking to advance into the high-speed ASIC and memory controller design industry. Job Description Translate architectural and product requirements into detailed microarchitecture specifications and robust hardware implementations. Lead in the development of digital designs that interact with internally developed full custom analog designs, 3rd party IP, and numerous SystemVerilog blocks specific to advancing Micron’s technology and product portfolio with careful consideration for performance, power, area, timing and testability. Design and develop RTL for next-generation DRAM/NAND/SSD controllers and systems. Own and support RTL development, simulation, synthesis, timing closure, formal verification, gate-level validation, and silicon bring-up support. Partner with teams from Design Verification, Analog Design, Synthesis and Physical Design.