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Silicon Roles

PMTS ASIC Digital Design IP ENGINEERING

GlobalfoundriesSanta Clara$167,000+RTL DesignASIC & SoC Architecture
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The published floor of $167,000 is exactly at the RTL Design median of $167,000. First seen on this site 2026-09-22, open 4 days.
Posted 2026-08-10 · read from workday

About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Summary of Role: The PMTS Digital Design Engineer will lead the architecture implementation, microarchitecture development, and RTL design of high-performance processor cores and subsystem components. This role requires deep expertise in processor design, strong technical leadership, and the ability to drive complex SoC development programs from concept through silicon bring-up. The candidate will work closely with architecture, verification, physical design, DFT, firmware, and software teams to deliver competitive processor products meeting performance, power, area, and schedule targets. Essential Responsibilities: Processor Microarchitecture & RTL Design Develop and implement microarchitecture for CPU cores, cache subsystems, memory management units (MMU), interconnects, and system controllers. Translate architectural specifications into high-quality RTL designs using Verilog/SystemVerilog. Define and review detailed design specifications, block-level architectures, and implementation strategies. Drive performance optimization, power reduction, and area-efficient design methodologies.